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                                                        Design Entry

Design entry can be done graphically in a schematic design system, as text in any high level language such as VHDL or Verilog or via spreadsheets.

The schematic design system has a central role in the design process because it is the place where the structure of the design is documented. It is therefore imperative that the system is reliable, easy to use and equipped with the functionality required. The requirements may vary depending on how advanced the designs to be produced are. It is also important that the system is well integrated with other design environments such as simulation, signal integrity analysis, printed circuit board layout and the company's common component and product databases (PLM).

We offer four different schematic entry systems, from Cadence OrCAD Capture to Cadence Allegro Design Entry HDL. For entry using high-level languages for FPGA design, we offer ALDEC Active-HDL Designer and Allegro System Architect in the latter input from a spreadsheet is available.

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