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Version
4.0
Datasheet
Film
CircuitSpace
Enhanced clustering, placement, and design reuse technology
Designers reduce board layout and placement time from weeks to minutes through
CircuitSpace® AutoClustering™ technology, intelligent design (IP) reuse, and
replication. Reductions in PCB design time have a direct impact on
time-to-market for new products, which directly correlates to profitability.
CircuitSpace breaks down the current 'click and drag' placement tedium and
accelerates the whole design process. CircuitSpace seamlessly integrates with
Cadence® Allegro® PCB Editor or OrCAD® PCB Editor and allows users to achieve
board layouts in a fraction of the time it would take to complete by hand.

Accelerate
the Component Placement Process
CircuitSpace implements a hierarchical approach to printed circuit board
design through enhanced AutoClustering and replication technologies.
With the AutoCluster feature designers achieve the same results that, by
hand, would typically require tedious, time-consuming and error-prone
effort. CircuitSpace extracts data directly from the schematic and
components are automatically gathered into interconnected groups called
clusters. Once a cluster is created a rough placement of the components
is performed, simplifying a designer’s task of manual placement.
CircuitSpace also expedites the design process through the use of
template generation for global library usage across divisions, template
usage with and without etch, automated layout reference designator
propagation and automated change report between layout designs.
Implement Design Reuse
CircuitSpace makes it easy to duplicate layout decisions and apply
layouts to other boards without mapping reference designators or net
names. Designed and tested clusters can be reproduced in a design, or
even applied to a different board. Eliminate redundant work by
referencing existing designs and repurposing clusters in new designs.
Once available in the new design, create replicas of the repurposed
clusters and update as a group.
Easily Manage Design Modifications
Designs are revised over time, during the course of a project, and from
board to board. CircuitSpace propagates changes and helps designers
manage them effectively. Checkpoint reports describe a board’s current
state, enumerating clusters, members and nets. Designers can save and
compare design checkpoints at any time during a design project.
Comparison reports identify the difference between a checkpoint report
and a board, or another check point report. Designers can review the
additions to a cluster’s membership before modifying the actual cluster.
Features:
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Create
functional groups of components based on design information through
AutoClustering
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Bi-directional communication between Cadence Allegro and OrCAD PCB
Editor and a (PDF) schematic is possible through cross-probing
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Create
multiple replicas of a source cluster's net topology
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Propagate cluster membership, placement and shape changes to
specified clusters
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Save a
design checkpoint at any time and compare it against other
checkpoints
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Create
a cluster from a specified group of components
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Propagate cluster reference designator text locations to target
clusters
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Create
templates containing a cluster’s membership, net topology, and
placement information
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Reuse
design templates in new or legacy designs
EMA Design Automation Inc. is developing and distributing software for
electronic design and is also the Cadence Channel Partner in North America. One example
of their products is TimingDesigner which GATEline AB
have been marketing in Sweden, Norway and Finland since 1991.
www.ema-eda.com
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