OrCAD Signal Explorer

Pre- and post-route signal integrity analysis and board-level topology exploration.

Cadence® OrCAD® Signal Explorer enables signal exploration, analysis, and validation that helps engineers address signal integrity issues throughout the design process-from the beginning of the design cycle through placement and final routing. In the pre-routing stages, OrCAD Signal Explorer allows engineers to prototype and access topology interconnect alternatives quickly to improve circuit reliability and performance. In the final stages, it provides design verification directly from the PCB Editor database. Seamless integration with Cadence OrCAD PCB Editor eliminates database conversion and possible translation issues.

Key benefits:

Enables pre- and post-route SI analysis at any stage of the design cycle.
Provides ability to explore, analyze, and design interconnect topology to help increase circuit reliability, improve circuit performance, and help reduce prototype re-spins.
Eliminates need to translate design databases to run simulations by importing topology extraction directly from the PCB Editor.
Includes an easy-to-use editing environment to create, manipulate, and validate a variety of models quickly.

Features in brief:

Macro modeling support (DML)	Graphical topology editor
IBIS 4.2 support	Lossy transmission lines
IBIS ICM model support	Coupled (3 net) simulation
Spectre-to-DML conversion	Differential pair exploration and simulation
HSPICE-to-IBIS conversion

SigXplorer.

Signal Explorer contains a module (SigXplorer) for the design and analysis of signal patterns even before the schematics is drawn. This type of analysis is important early in the design stage when designers want to evaluate how a new component technology or how an increase in data rate of a data bus affects function.

Simulation Environment.

Signal Explorer provides a SPICE-based simulation environment for analyzing signal integrity on the PCB. The simulator contains TIsim, SigWave for the display of waveforms, the modelling language DML (Device Modelling Language), a translator from other modelling formats, and a system for managing library models. SigWave provides the ability to directly import waveforms from both of test kits and other popular signal integrity tools.

Construction and validation of simulation models.

Signal Explorer provides a module where the models are quickly and easily generated, manipulated and verified.

Model Formats included are:

IBIS 4.2 External Model support for Verilog®-A, Cadence Spectre®,HSPICE, Cadence eSpice models.
IBIS ICM package and connector models.
SPICE device models.
Cadence Device Modeling Language (DML).
Mentor/Quad XTK.

Version 16.5

Datasheet

Cadence OrCAD Signal Explorer Signal Integrity Technology

Cadence OrCAD Downloads